1. Field of the Invention
The present invention relates to a manufacturing method of an electronic components embedded substrate, in which electronic components such as an active element (for example, a transistor composing an electronic circuit) and a positive element (for example, a capacitor and a resistance) are embedded.
2. Description of the Related Art
In recent years, in accordance with high density mounting of electronic components, an electronic components embedded substrate, in which electronic components such as an active element and a positive element are embedded, has been proposed.
According to such a system for embedding the electronic components on the substrate, for example, in the event of incorporating a semiconductor chip and a chip component such as a resistance or a capacitor or the like embedded together on the substrate, since thickness of each component is different, some countermeasures, for example, (1) embedding each component after forming a cavity on a mounted layer for each thickness and (2) using a spacer at a lower part of the mounted layer so that each thickness becomes equal, are required.
These methods (1) and (2) involve a problem such that the number of processes and components is increased due to formation of the cavity and mounting of the spacer, and this makes these methods technologically unsatisfying.
In order to improve such a problem, JP-A-2002-110714 and JP-A-2002-290006 are suggested. In these suggestions, a method to seal a plurality of electronic components having different thicknesses by resin and to make an electronic components embedded substrate are disclosed.                [Patent Document] JP-A-2002-110714        [Patent Document] JP-A-2002-290006        
However, according to the above-described JP-A-2002-110714, the electronic components are mounted on an insulative dummy sheet once to be provided with resin sealing, and then, the dummy sheet is peeled off. This dummy sheet is unnecessary in a final configuration.
On the other hand, in JP-A-2002-290006, after setting up a bonding wire on an electrode of the electronic component and performing resin sealing, the resin layer is ground to expose a surface of the bonding wire and planarize it. Therefore, depending on a property of resin and how to perform the resin sealing process, the bonding wire may fall down or a front end position of the bonding wire may be deviated, and this makes it difficult to dispose the front end of the bonding wire at a predetermined position and accurately set a position where an outer terminal (a solder hall) is arranged. In this JP-A-2002-290006, restrains are placed on the property of the resin and the resin sealing process.
Therefore, reduction of the number of the components and the processes and improvement of mass productivity are further expected.